{"id":21,"date":"2014-05-29T04:55:52","date_gmt":"2014-05-29T04:55:52","guid":{"rendered":"http:\/\/sgintellectual.com\/?page_id=21"},"modified":"2014-06-07T06:29:14","modified_gmt":"2014-06-07T06:29:14","slug":"layout-designs","status":"publish","type":"page","link":"https:\/\/www.sgintellectual.com\/?page_id=21","title":{"rendered":"Semiconductor Integrated Circuits layout design"},"content":{"rendered":"

Semiconductor Integrated circuits Layout designs (topographies) is one of the element of\u00a0intellectual property and it also needed protection.<\/span><\/p>\n

Intellectual property law, a “mask work” is a two or three-dimensional layout or topography of an integrated circuit\u00a0(IC or “chip”), i.e. the arrangement on a chip of\u00a0semiconductor devices\u00a0such as\u00a0transistors\u00a0and passive\u00a0electronic\u00a0components such as\u00a0resistors\u00a0and interconnections. The layout is called a\u00a0mask<\/em>\u00a0work because, in\u00a0photolithographic\u00a0processes, the multiple etched layers within actual ICs are each created using a mask, called the\u00a0photo mask, to permit or block the light at specific locations, sometimes for hundreds of chips on a wafer\u00a0simultaneously.<\/span><\/p>\n

Because of the functional nature of the mask geometry, the designs cannot be effectively protected under copyright\u00a0law (except perhaps as decorative art). Similarly, because individual lithographic mask works are not clearly protectable subject matter, they also cannot be effectively protected under\u00a0patent\u00a0law, although any processes implemented in the work may be patentable. So since the 1990s, national governments have been granting copyright-like exclusive rights conferring time-limited exclusivity to reproduction of a particular layout.<\/span><\/p>\n

A semiconductor integrated circuit is a product having transistors and other circuitry elements, which are inseparably formed on a semiconductor material or an insulating material or inside the semiconductor material and designed to perform an electronic circuitry function. In India, the Semiconductor Integrated Circuits Layout-Design Act, 2000 (hereinafter known as the “Act”), along with the Semiconductor Integrated Circuits-Layout Design Rules, 2001, is the prevailing law. Registering the layout-design under the Act gives the rights holder the exclusive right to the layout-design and to obtain relief in respect of infringement.<\/span><\/p>\n

Prohibition of Registration of certain layout Designs<\/strong>\u00a0(Section-7)<\/span>
\n (1) If a layout design<\/span>
\n (a) Which is not original; or<\/span>
\n (b) Which has been commercially exploited anywhere in India or in a convention Country; or<\/span>
\n (c) which is not inherently distinctive; or<\/span>
\n (d) which is not inherently capable of being distinguishable from any other registered layout-design,\u00a0shall not be registered as a layout Design.<\/span><\/p>\n

Provided that a layout design which has been commercially exploited for not more than two years from the date on which an application for its registration has been filed either in India or in a convention country shall be treated as not have been commercially exploited for the purposes of this section.<\/span><\/p>\n

(2) A layout-design shall be considered to be original if it is\u00a0 the result of its creator’s own intellectual efforts and is not commonly known to the creators of layout-designs and manufactures of semiconductor integrated circuits at the time of creation.<\/span><\/p>\n

Provided that a layout-design consisting of such combination of elements and interconnections that are commonly known among creators of layout-designs and manufacturers of semiconductor integrated circuits shall be considered as Original if such combination taken as a whole is the result of its creator’s own intellectual efforts.<\/span><\/p>\n

Q.\u00a0How to register Semiconductor layout design ?<\/strong><\/span>
\n Ans:<\/strong>\u00a0 Any person who is claiming to be the creator of a layout-design and who is interested in registering it has to apply in writing to the Registrar. The Registrar may refuse the application or may accept it fully or subject to amendments. Within fourteen days from the date of acceptance, the Registrar will advertise the application. Within three months from the date of the advertisement of the application, any person may oppose the application by providing written notice and a fee to the Registrar. After hearing the parties and examining the evidence, the Registrar will decide the opposition.<\/span><\/p>\n

If the application has been accepted and not opposed, or if opposed and the opposition has been decided in the favor of the Applicant, then the Registrar will register the layout-design. This registration is valid for a term of ten years from the date of filing an application for registration or from the date of first commercial exploitation anywhere in the world, whichever is earlier.<\/span><\/p>\n

3.What is the term of Semiconductor layout designs ?<\/strong><\/span>
\n Ans. The term of Semiconductor layout designs is 10 years.<\/strong><\/span>
\n A registered layout-design is infringed by a person who, not being the registered proprietor of the layout-design or a registered user thereof,\u00a0Does any act of reproducing, whether by incorporating in a semiconductor integrated circuit or otherwise, a registered layout-design in its entirety or any part thereof; or\u00a0Does any act of importing or selling or otherwise distributing for commercial purposes a registered layout-design or a semiconductor integrated circuit incorporating such registered layout-design or an article incorporating such a semiconductor integrated circuit containing such registered layout-design for the use of which such person is not entitled.<\/span><\/p>\n

The Act also provides for the rectification and correction of the Register. Any person who is aggrieved by the absence or omission from the Register of any entry or by an entry made in the Register without sufficient cause, or by an entry remaining on the Register wrongly, or by an error or defect in any entry in the Register, may apply to the Appellate Board or to the Registrar to expunge the entry. The Registrar or the Appellate Board may expunge or vary the entry as it may think fit.<\/span><\/p>\n

Infringement of a layout-design is considered to be a criminal offence in India. Any person who has infringed is liable to be punished by imprisonment for a term, which may extend to three years or by fine of more than INR fifty thousand (approximately $1,250) but less than INR ten lakhs (approximately $25,000) or both.<\/span><\/p>\n

Legislation and Regulation in India<\/strong>\u00a0<\/strong><\/span>
\n The Semiconductor Integrated Circuits Layout-Design Act, 2000<\/span>
\n The Semiconductor Integrated Circuits-Layout Design Rules, 2001.<\/span>